Amplifier Bandwidth

An ideal amplifier multiplies its input by a constant gain A_v at all frequencies. In practice, parasitic capacitance (from transistors, wiring, and the load) shunts high-frequency signals to ground. We model this with a single resistor R and capacitor C at the output.

The amplifier output sees a voltage divider between R and the capacitor's impedance. Let's work through the derivation step by step.

First, recall the capacitor impedance. A capacitor's impedance in the frequency domain is:

As ω increases, Z_C gets smaller. The capacitor becomes a better conductor at high frequencies, which is why it shunts the signal to ground.

1. Write the voltage divider. The output voltage V_out is taken across the capacitor, so:
   V_outV_amp = Z_CR + Z_C
   The standard voltage divider: output fraction equals the bottom impedance over the total impedance.
2. Substitute the capacitor impedance Z_C = 1/(jωC):
   = 1jωC R + 1jωC
   A fraction within a fraction. We can clean this up.
3. Multiply numerator and denominator by jωC to clear the inner fractions:
   = jωC · 1jωC jωC · R  +  jωC · 1jωC = 1 jωRC + 1
   Numerator: jωC × 1/(jωC) cancels, leaving 1.
   Denominator: distribute jωC across both terms. jωC × R = jωRC, and jωC × 1/(jωC) = 1. Together that gives jωRC + 1.
4. Rearrange to put the constant term first (standard form):
   = 1 1 + jωRC
   This is already the first-order low-pass transfer function. The product RC is the time constant τ = RC.
5. Define the cutoff frequency ω₀ = 1/RC. Since ωRC = ω/(1/RC) = ω/ω₀, we can write:
   = 1 1 + j(ω/ω₀)
   The behaviour now depends on a single ratio: the signal frequency ω compared to the natural frequency ω₀.
6. Include the amplifier gain A_v. The amplifier multiplies the input by A_v before the RC network, so the complete transfer function is:
   H(jω) = A_v 1 + j(ω/ω₀)
   This is the standard single-pole low-pass transfer function. Everything from here follows from this one equation.

What does this mean physically?

• At low frequencies (ω ≪ ω₀): the term j(ω/ω₀) is negligibly small, so the denominator ≈ 1 and the gain is simply A_v. The capacitor is essentially an open circuit.
• At high frequencies (ω ≫ ω₀): the imaginary term dominates, the denominator grows, and the gain drops. The capacitor shorts the output to ground.
• At ω = ω₀: the real and imaginary parts of the denominator are equal (both = 1), giving a denominator magnitude of √2 and a gain of A_v/√2. This is the −3 dB point.

The denominator 1 + j(ω/ω₀) is a point in the complex plane. The real part is fixed at 1. The imaginary part is ω/ω₀, which grows with frequency. Use the test frequency slider to watch the phasor grow:

Three things to notice as you increase ω:

• The phasor gets longer. Its magnitude is √(1 + (ω/ω₀)²). Since this is in the denominator of H, the gain drops.
• The phasor tilts upward. The angle is arctan(ω/ω₀). This angle becomes the phase lag of the output signal.
• At ω = ω₀, the imaginary part equals the real part (both = 1), so the magnitude is √2 ≈ 1.414. The gain is A_v/√2, which is exactly −3 dB below the mid-band gain.

What the angle means: phase lag

Dividing by a complex number with angle θ rotates the result by −θ. So the angle of the denominator phasor becomes a phase lag on the output signal. Physically, the capacitor can't charge instantaneously through the resistor. At low frequencies it has plenty of time to track the input, so the output stays in phase. At higher frequencies the input changes faster than the RC circuit can follow, so the output falls behind.

• ω ≪ ω₀: the angle is near 0°, output tracks the input with almost no delay.
• ω = ω₀: the angle is −45°, the output lags the input by one-eighth of a cycle.
• ω ≫ ω₀: the angle approaches −90°. The capacitor dominates and current leads voltage by 90°.

The plot below shows what this looks like in the time domain. The yellow wave is the input, the green wave is the output. As you increase the test frequency past ω₀, watch the output shrink and shift to the right:

We now have the magnitude of the transfer function from Part 02:

We could plot this directly (gain vs. frequency), but the numbers span enormous ranges. A gain of 1000 at 1 rad/s and 0.001 at 1 000 000 rad/s on a linear plot would be unreadable. Two standard tricks compress the scale:

1. Convert gain to decibels (dB). The decibel is a logarithmic unit that compresses large ratios into manageable numbers:
   |H|_dB = 20 log₁₀ |H|
   A gain of 100 becomes 40 dB. A gain of 1000 becomes 60 dB. A gain of 1 (unity) is 0 dB. Halving the voltage is −6 dB.
2. Use a logarithmic frequency axis. Instead of spacing frequencies linearly (0, 100, 200, 300...), we space them by powers of 10, called decades:
   ... 10¹  →  10²  →  10³  →  10⁴  →  10⁵ ...
   Each step is a 10× increase. This means 1 Hz and 1 MHz can appear on the same axis with equal visual weight.
3. Substitute into the magnitude equation to get the dB form:
   |H|_dB = 20 log₁₀ A_v − 20 log₁₀ √(1 + (ω/ω₀)²)
   The fraction splits into a subtraction in log-space. The first term is the mid-band gain (constant). The second term is the loss due to the RC filter (grows with frequency).
4. Simplify using the half-power rule:
   = 20 log₁₀ A_v − 10 log₁₀(1 + (ω/ω₀)²)
   The 20·log of a square root becomes 10·log, since log(√x) = ½·log(x). This is the equation we plot below.

The result is a curve that is flat at low frequencies, then bends into a straight downward slope at high frequencies. This is the Bode magnitude plot:

Reading the three regimes

The shape of the curve comes directly from the equation. In each regime, one part of the denominator dominates:

In Parts 01 to 03 we treated the gain A_v and the cutoff frequency ω₀ as independent parameters. In a real amplifier, they are linked. To see why, we need to understand how amplifiers are used in practice.

Open-loop vs closed-loop

An op-amp on its own (no external components) has a very high open-loop gain A_OL, typically 100,000 or more. But this gain is unstable, temperature-dependent, and varies between chips. It is not usable directly.

To get a precise, predictable gain, we connect a feedback network (usually two resistors) from the output back to the inverting input. This is called negative feedback. The resistor ratio sets the closed-loop gain A_CL:

The closed-loop gain depends only on the external resistors, not on the op-amp's internal gain (as long as A_OL is much larger than A_CL). This is what makes op-amp circuits reliable.

The tradeoff: gain vs bandwidth

Here is the catch. The op-amp has internal parasitic capacitance (from its transistors) that creates a single dominant pole, just like the RC model in Part 01. This gives the open-loop response a fixed gain-bandwidth product (GBP):

When you use feedback to reduce the gain from A_OL down to A_CL, the bandwidth extends by the same factor. The product is fixed by the silicon. You can have high gain or wide bandwidth, but not both.

• High gain (A_CL = 1000): strong amplification, but ω₀ is low. The amplifier can only handle slow signals.
• Low gain (A_CL = 10): modest amplification, but ω₀ is 100× higher. The amplifier responds to much faster signals.
• Unity gain (A_CL = 1): no amplification, but ω₀ equals the GBP itself. This is the maximum bandwidth the amplifier can achieve, which is why datasheets call it the "unity-gain bandwidth".

Seeing the tradeoff

The plot below overlays the Bode magnitude curves for several closed-loop gains, all from the same amplifier (same GBP). The dashed line is the open-loop envelope. Increasing A_CL shifts the curve up but pushes ω₀ to the left: